AESE (vectors)

AES single round encryption

The AESE instruction reads a 16-byte state array from each 128-bit segment of the first source vector together with a round key from the corresponding 128-bit segment of the second source vector. Each state array undergoes a single round of the AddRoundKey(), ShiftRows() and SubBytes() transformations in accordance with the AES standard. Each updated state array is destructively placed in the corresponding segment of the first source vector. This instruction is unpredicated.

ID_AA64ZFR0_EL1.AES indicates whether this instruction is implemented.

This instruction is legal when executed in Streaming SVE mode if one of the following is true:

  • Both FEAT_SSVE_AES and FEAT_SVE_AES are implemented.
  • FEAT_SME_FA64 is implemented and enabled.

    • Encoding: SVE2

    Variants: FEAT_SVE_AES (ARMv9.0)

    313029282726252423222120191817161514131211109876543210
    0100010100100010111000
    sizeopo2ZmZdn

    AESE <Zdn>.B, <Zdn>.B, <Zm>.B

    Decoding algorithm

    if !IsFeatureImplemented(FEAT_SVE_AES) then EndOfDecode(Decode_UNDEF);
constant integer m = UInt(Zm);
constant integer dn = UInt(Zdn);

    Operation

    if IsFeatureImplemented(FEAT_SSVE_AES) then
    CheckSVEEnabled();
else
    CheckNonStreamingSVEEnabled();
constant integer VL = CurrentVL;
constant integer segments = VL DIV 128;
constant bits(VL) operand1 = Z[dn, VL];
constant bits(VL) operand2 = Z[m, VL];
bits(VL) result;

result = operand1 EOR operand2;
for s = 0 to segments-1
    Elem[result, s, 128] = AESSubBytes(AESShiftRows(Elem[result, s, 128]));

Z[dn, VL] = result;

    Explanations

    <Zdn>: Is the name of the first source and destination scalable vector register, encoded in the "Zdn" field.
    <Zm>: Is the name of the second source scalable vector register, encoded in the "Zm" field.

    Operational Notes

    If PSTATE.DIT is 1: