Scatter lower bits into positions selected by bitmask
This instruction scatters the lowest-numbered contiguous bits within each element of the first source vector to the bit positions indicated by non-zero bits in the corresponding mask element of the second source vector, preserving their order, and set the bits corresponding to a zero mask bit to zero. This instruction is unpredicated.
ID_AA64ZFR0_EL1.BitPerm indicates whether this instruction is implemented.
This instruction is illegal when executed in Streaming SVE mode, unless FEAT_SME_FA64 is implemented and enabled, or FEAT_SSVE_BitPerm is implemented.
Variants: FEAT_SVE_BitPerm (ARMv9.0)
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | |||||||||||||||||
| size | Zm | opc | Zn | Zd | |||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
BDEP <Zd>.<T>, <Zn>.<T>, <Zm>.<T>
if !IsFeatureImplemented(FEAT_SVE_BitPerm) then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer n = UInt(Zn); constant integer m = UInt(Zm); constant integer d = UInt(Zd);
if IsFeatureImplemented(FEAT_SSVE_BitPerm) then
CheckSVEEnabled();
else
CheckNonStreamingSVEEnabled();
constant integer VL = CurrentVL;
constant integer elements = VL DIV esize;
constant bits(VL) data = Z[n, VL];
constant bits(VL) mask = Z[m, VL];
bits(VL) result;
for e = 0 to elements - 1
Elem[result, e, esize] = BitDeposit(Elem[data, e, esize], Elem[mask, e, esize]);
Z[d, VL] = result;If PSTATE.DIT is 1: