BF1CVT, BF2CVT

Multi-vector convert from 8-bit floating-point to BFloat16 (in-order)

This instruction converts each 8-bit floating-point element of the source vector to BFloat16 while downscaling the value, and places the results in the corresponding 16-bit elements of the destination vectors. BF1CVT scales the values by 2-UInt(FPMR.LSCALE[5:0]). BF2CVT scales the values by 2-UInt(FPMR.LSCALE2[5:0]). The 8-bit floating-point encoding format for BF1CVT is selected by FPMR.F8S1. The 8-bit floating-point encoding format for BF2CVT is selected by FPMR.F8S2.

This instruction is unpredicated.

Encoding: BF1CVT

Variants: FEAT_SME2 && FEAT_FP8 (FEAT_SME2 && FEAT_FP8)

313029282726252423222120191817161514131211109876543210
11000001011001101110000
opcZnZdL

BF1CVT { <Zd1>.H-<Zd2>.H }, <Zn>.B

Decoding algorithm

if !IsFeatureImplemented(FEAT_SME2) || !IsFeatureImplemented(FEAT_FP8) then
    EndOfDecode(Decode_UNDEF);
constant integer n = UInt(Zn);
constant integer d = UInt(Zd: '0');
constant boolean issrc2 = FALSE;

Encoding: BF2CVT

Variants: FEAT_SME2 && FEAT_FP8 (FEAT_SME2 && FEAT_FP8)

313029282726252423222120191817161514131211109876543210
11000001111001101110000
opcZnZdL

BF2CVT { <Zd1>.H-<Zd2>.H }, <Zn>.B

Decoding algorithm

if !IsFeatureImplemented(FEAT_SME2) || !IsFeatureImplemented(FEAT_FP8) then
    EndOfDecode(Decode_UNDEF);
constant integer n = UInt(Zn);
constant integer d = UInt(Zd: '0');
constant boolean issrc2 = TRUE;

Operation

CheckFPMREnabled();
CheckStreamingSVEEnabled();
constant integer VL = CurrentVL;
constant integer elements = VL DIV 8;
constant bits(VL) operand = Z[n, VL];
bits(2*VL) result;

for e = 0 to elements-1
    constant bits(8) element = Elem[operand, e, 8];
    Elem[result, e, 16] = FP8ConvertBF(element, issrc2, FPCR, FPMR);

Z[d+0, VL] = result;
Z[d+1, VL] = result<2*VL-1:VL>;

Explanations

<Zd1>: Is the name of the first scalable vector register of the destination multi-vector group, encoded as "Zd" times 2.
<Zd2>: Is the name of the second scalable vector register of the destination multi-vector group, encoded as "Zd" times 2 plus 1.
<Zn>: Is the name of the source scalable vector register, encoded in the "Zn" field.