BFXIL

Bitfield extract and insert at low end

This instruction copies a bitfield of <width> bits starting from bit position <lsb> in the source register to the least significant bits of the destination register, leaving the other destination bits unchanged.

Encoding: Leaving other bits unchanged

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	0	1	1	0	0	1	1	0
sf	opc								N	immr						imms						Rn					Rd

32-bit (sf == 0 && N == 0)

BFXIL <Wd>, <Wn>, #<lsb>, #<width>

Equivalent to: BFM <Wd>, <Wn>, #<lsb>, #(<lsb>+<width>-1)

64-bit (sf == 1 && N == 1)

BFXIL <Xd>, <Xn>, #<lsb>, #<width>

Equivalent to: BFM <Xd>, <Xn>, #<lsb>, #(<lsb>+<width>-1)

Explanations

<Wd>: Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.
<Wn>: Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.
<lsb>: For the "32-bit" variant: is the bit number of the lsb of the source bitfield, in the range 0 to 31.
<lsb>: For the "64-bit" variant: is the bit number of the lsb of the source bitfield, in the range 0 to 63.
<width>: For the "32-bit" variant: is the width of the bitfield, in the range 1 to 32-<lsb>.
<width>: For the "64-bit" variant: is the width of the bitfield, in the range 1 to 64-<lsb>.
<Xd>: Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.
<Xn>: Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.

Operational Notes

If PSTATE.DIT is 1:

• The execution time of this instruction is independent of:
  • The values of the data supplied in any of its registers.
  • The values of the NZCV flags.
• The response of this instruction to asynchronous exceptions does not vary based on:
  • The values of the data supplied in any of its registers.
  • The values of the NZCV flags.