FCVTN

Half-precision convert, narrow and interleave to 8-bit floating-point

Convert each half-precision element of the group of two source vectors to 8-bit floating-point while scaling the value by 2SInt(FPMR.NSCALE[4:0]), and place the two-way interleaved results in the corresponding 8-bit elements of the destination vector. The 8-bit floating-point encoding format is selected by FPMR.F8D.

This instruction is unpredicated.

Encoding: SVE2

Variants: (FEAT_SVE2 || FEAT_SME2) && FEAT_FP8 ((FEAT_SVE2 || FEAT_SME2) && FEAT_FP8)

313029282726252423222120191817161514131211109876543210
01100101000010100011000
opcZnZd

FCVTN <Zd>.B, { <Zn1>.H-<Zn2>.H }

Decoding algorithm

if ((!IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME2)) ||
      !IsFeatureImplemented(FEAT_FP8)) then EndOfDecode(Decode_UNDEF);
constant integer n = UInt(Zn:'0');
constant integer d = UInt(Zd);

Operation

CheckFPMREnabled();
if IsFeatureImplemented(FEAT_SME2) then CheckSVEEnabled(); else CheckNonStreamingSVEEnabled();
constant integer VL = CurrentVL;
constant integer elements = VL DIV 16;
bits(VL) result;

constant bits(VL) operand1 = Z[n+0, VL];
constant bits(VL) operand2 = Z[n+1, VL];
for e = 0 to elements-1
    constant bits(16) element1 = Elem[operand1, e, 16];
    constant bits(16) element2 = Elem[operand2, e, 16];
    Elem[result, 2*e + 0, 8] = FPConvertFP8(element1, FPCR, FPMR, 8);
    Elem[result, 2*e + 1, 8] = FPConvertFP8(element2, FPCR, FPMR, 8);

Z[d, VL] = result;

Explanations

<Zd>: Is the name of the destination scalable vector register, encoded in the "Zd" field.
<Zn1>: Is the name of the first scalable vector register of the source multi-vector group, encoded as "Zn" times 2.
<Zn2>: Is the name of the second scalable vector register of the source multi-vector group, encoded as "Zn" times 2 plus 1.