FCVTNT (predicated)

Floating-point down convert and narrow (top, predicated)

Convert active floating-point elements from the source vector to the next lower precision, and place the results in the odd-numbered half-width elements of the destination vector, leaving the even-numbered elements unchanged. Inactive elements in the destination vector register remain unmodified or are set to zero, depending on whether merging or zeroing predication is selected.

Encoding: Single-precision to half-precision, merging

Variants: FEAT_SVE2 || FEAT_SME (FEAT_SVE2 || FEAT_SME)

313029282726252423222120191817161514131211109876543210
0110010010001000101
opcopc2PgZnZd

FCVTNT <Zd>.H, <Pg>/M, <Zn>.S

Decoding algorithm

if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then
    EndOfDecode(Decode_UNDEF);
constant integer esize = 32;
constant integer g = UInt(Pg);
constant integer n = UInt(Zn);
constant integer d = UInt(Zd);
constant boolean merging = TRUE;

Encoding: Single-precision to half-precision, zeroing

Variants: FEAT_SVE2p2 || FEAT_SME2p2 (FEAT_SVE2p2 || FEAT_SME2p2)

313029282726252423222120191817161514131211109876543210
0110010010000000101
opcopc2PgZnZd

FCVTNT <Zd>.H, <Pg>/Z, <Zn>.S

Decoding algorithm

if !IsFeatureImplemented(FEAT_SVE2p2) && !IsFeatureImplemented(FEAT_SME2p2) then
    EndOfDecode(Decode_UNDEF);
constant integer esize = 32;
constant integer g = UInt(Pg);
constant integer n = UInt(Zn);
constant integer d = UInt(Zd);
constant boolean merging = FALSE;

Encoding: Double-precision to single-precision, merging

Variants: FEAT_SVE2 || FEAT_SME (FEAT_SVE2 || FEAT_SME)

313029282726252423222120191817161514131211109876543210
0110010011001010101
opcopc2PgZnZd

FCVTNT <Zd>.S, <Pg>/M, <Zn>.D

Decoding algorithm

if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then
    EndOfDecode(Decode_UNDEF);
constant integer esize = 64;
constant integer g = UInt(Pg);
constant integer n = UInt(Zn);
constant integer d = UInt(Zd);
constant boolean merging = TRUE;

Encoding: Double-precision to single-precision, zeroing

Variants: FEAT_SVE2p2 || FEAT_SME2p2 (FEAT_SVE2p2 || FEAT_SME2p2)

313029282726252423222120191817161514131211109876543210
0110010011000010101
opcopc2PgZnZd

FCVTNT <Zd>.S, <Pg>/Z, <Zn>.D

Decoding algorithm

if !IsFeatureImplemented(FEAT_SVE2p2) && !IsFeatureImplemented(FEAT_SME2p2) then
    EndOfDecode(Decode_UNDEF);
constant integer esize = 64;
constant integer g = UInt(Pg);
constant integer n = UInt(Zn);
constant integer d = UInt(Zd);
constant boolean merging = FALSE;

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
constant integer halfesize = esize DIV 2;
constant bits(PL) mask = P[g, PL];
constant bits(VL) operand = if AnyActiveElement(mask, esize) then Z[n, VL] else Zeros(VL);
bits(VL) result = Z[d, VL];

for e = 0 to elements-1
    if ActivePredicateElement(mask, e, esize) then
        constant bits(esize) element = Elem[operand, e, esize];
        Elem[result, 2*e + 1, halfesize] = FPConvertSVE(element, FPCR, halfesize);

    elsif !merging then
        Elem[result, 2*e + 1, halfesize] = Zeros(halfesize);

Z[d, VL] = result;

Explanations

<Zd>: Is the name of the destination scalable vector register, encoded in the "Zd" field.
<Pg>: Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.
<Zn>: Is the name of the source scalable vector register, encoded in the "Zn" field.