GCSSS1

Guarded Control Stack switch stack 1

This instruction validates that the stack being switched to contains a Valid cap entry, stores an In-progress cap entry to the stack that is being switched to, and sets the current Guarded control stack pointer to the stack that is being switched to.

If the instruction generates a synchronous Data Abort exception, Watchpoint exception, GPC exception, or GCS Data Check exception, the value of GCSPR_ELx for the current Exception level is restored to the value held in the register before the instruction was executed.

Encoding: System

Variants: FEAT_GCS (ARMv9.4)

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	1	0	1	0	1	0	0	0	0	1	0	1	1	0	1	1	1	0	1	1	1	0	1	0
										L			op1			CRn				CRm				op2			Rt

GCSSS1 <Xt>

Equivalent to: SYS #3, C7, C7, #2, <Xt>

Explanations

<Xt>: Is the 64-bit name of the general-purpose source register, encoded in the "Rt" field.