IC

Instruction cache operation

For more information, see op0==0b01, cache maintenance, TLB maintenance, and address translation instructions.

Encoding: System

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	1	0	1	0	1	0	0	0	0	1				0	1	1	1
										L			op1			CRn				CRm				op2			Rt

IC <ic_op>{, <Xt>}

Equivalent to: SYS #<op1>, C7, <Cm>, #<op2>{, <Xt>}

Explanations

<ic_op>: <Xt>: Is the 64-bit name of the optional general-purpose source register, defaulting to '11111', encoded in the "Rt" field.