MOVA (vector to tile, two registers)

Move two vector registers to two ZA tile slices

This instruction operates on two consecutive horizontal or vertical slices within a named ZA tile of the specified element size.

The consecutive slice numbers within the tile are selected starting from the sum of the slice index register and immediate offset, modulo the number of such elements in a vector. The immediate offset is a multiple of 2 in the range 0 to the number of elements in a 128-bit vector segment minus 2.

This instruction is unpredicated.

Encoding: 8-bit

Variants: FEAT_SME2 (ARMv9.3)

313029282726252423222120191817161514131211109876543210
1100000000000100000000
sizeVRsZnoff3

MOVA ZA0<HV>.B[<Ws>, <offs1>:<offs2>], { <Zn1>.B-<Zn2>.B }

Decoding algorithm

if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF);
constant integer s = UInt('011':Rs);
constant integer nreg = 2;
constant integer esize = 8;
constant integer n = UInt(Zn:'0');
constant integer d = 0;
constant integer offset = UInt(off3:'0');
constant boolean vertical = V == '1';

Encoding: 16-bit

Variants: FEAT_SME2 (ARMv9.3)

313029282726252423222120191817161514131211109876543210
1100000001000100000000
sizeVRsZnZAdoff2

MOVA <ZAd><HV>.H[<Ws>, <offs1>:<offs2>], { <Zn1>.H-<Zn2>.H }

Decoding algorithm

if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF);
constant integer s = UInt('011':Rs);
constant integer nreg = 2;
constant integer esize = 16;
constant integer n = UInt(Zn:'0');
constant integer d = UInt(ZAd);
constant integer offset = UInt(off2:'0');
constant boolean vertical = V == '1';

Encoding: 32-bit

Variants: FEAT_SME2 (ARMv9.3)

313029282726252423222120191817161514131211109876543210
1100000010000100000000
sizeVRsZnZAdo1

MOVA <ZAd><HV>.S[<Ws>, <offs1>:<offs2>], { <Zn1>.S-<Zn2>.S }

Decoding algorithm

if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF);
constant integer s = UInt('011':Rs);
constant integer nreg = 2;
constant integer esize = 32;
constant integer n = UInt(Zn:'0');
constant integer d = UInt(ZAd);
constant integer offset = UInt(o1:'0');
constant boolean vertical = V == '1';

Encoding: 64-bit

Variants: FEAT_SME2 (ARMv9.3)

313029282726252423222120191817161514131211109876543210
1100000011000100000000
sizeVRsZnZAd

MOVA <ZAd><HV>.D[<Ws>, <offs1>:<offs2>], { <Zn1>.D-<Zn2>.D }

Decoding algorithm

if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF);
constant integer s = UInt('011':Rs);
constant integer nreg = 2;
constant integer esize = 64;
constant integer n = UInt(Zn:'0');
constant integer d = UInt(ZAd);
constant integer offset = 0;
constant boolean vertical = V == '1';

Operation

CheckStreamingSVEAndZAEnabled();
constant integer VL = CurrentVL;
if nreg == 4 && esize == 64 && VL < 256 then EndOfDecode(Decode_UNDEF);
constant integer slices = VL DIV esize;
constant bits(32) index = X[s, 32];
constant integer slice = ((UInt(index) - (UInt(index) MOD nreg)) + offset) MOD slices;

for r = 0 to nreg-1
    constant bits(VL) result = Z[n + r, VL];
    ZAslice[d, esize, vertical, slice + r, VL] = result;

Explanations

<HV>: <Ws>: Is the 32-bit name of the slice index register W12-W15, encoded in the "Rs" field.
<offs1>: For the "8-bit" variant: is the first slice index offset, encoded as "off3" field times 2.
<offs1>: For the "16-bit" variant: is the first slice index offset, encoded as "off2" field times 2.
<offs1>: For the "32-bit" variant: is the first slice index offset, encoded as "o1" field times 2.
<offs1>: For the "64-bit" variant: is the first slice index offset, with implicit value 0.
<offs2>: For the "8-bit" variant: is the second slice index offset, encoded as "off3" field times 2 plus 1.
<offs2>: For the "16-bit" variant: is the second slice index offset, encoded as "off2" field times 2 plus 1.
<offs2>: For the "32-bit" variant: is the second slice index offset, encoded as "o1" field times 2 plus 1.
<offs2>: For the "64-bit" variant: is the second slice index offset, with implicit value 1.
<Zn1>: Is the name of the first scalable vector register of the source multi-vector group, encoded as "Zn" times 2.
<Zn2>: Is the name of the second scalable vector register of the source multi-vector group, encoded as "Zn" times 2 plus 1.
<ZAd>: For the "16-bit" variant: is the name of the ZA tile ZA0-ZA1 to be accessed, encoded in the "ZAd" field.
<ZAd>: For the "32-bit" variant: is the name of the ZA tile ZA0-ZA3 to be accessed, encoded in the "ZAd" field.
<ZAd>: For the "64-bit" variant: is the name of the ZA tile ZA0-ZA7 to be accessed, encoded in the "ZAd" field.

Operational Notes

If PSTATE.DIT is 1: