NEGS

Negate, setting flags

This instruction negates an optionally-shifted register value, and writes the result to the destination register. It updates the condition flags based on the result.

Encoding: Setting the condition flags

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	1	1	0	1	0	1	1			0												1	1	1	1	1	!= 11111
sf	op	S						shift			Rm					imm6						Rn					Rd

32-bit (sf == 0)

NEGS <Wd>, <Wm>{, <shift> #<amount>}

Equivalent to: SUBS <Wd>, WZR, <Wm>{, <shift> #<amount>}

64-bit (sf == 1)

NEGS <Xd>, <Xm>{, <shift> #<amount>}

Equivalent to: SUBS <Xd>, XZR, <Xm>{, <shift> #<amount>}

Explanations

<Wd>: Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.
<Wm>: Is the 32-bit name of the general-purpose source register, encoded in the "Rm" field.
<shift>: <amount>: For the "32-bit" variant: is the shift amount, in the range 0 to 31, defaulting to 0 and encoded in the "imm6" field.
<amount>: For the "64-bit" variant: is the shift amount, in the range 0 to 63, defaulting to 0 and encoded in the "imm6" field.
<Xd>: Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.
<Xm>: Is the 64-bit name of the general-purpose source register, encoded in the "Rm" field.

Operational Notes

If PSTATE.DIT is 1:

• The execution time of this instruction is independent of:
  • The values of the data supplied in any of its registers.
  • The values of the NZCV flags.
• The response of this instruction to asynchronous exceptions does not vary based on:
  • The values of the data supplied in any of its registers.
  • The values of the NZCV flags.