ORN (shifted register)

Bitwise OR NOT (shifted register)

This instruction performs a bitwise (inclusive) OR of a register value and the complement of an optionally-shifted register value, and writes the result to the destination register.

Encoding: Not setting the condition flags

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	0	1	0	1	0	1	0			1
sf	opc							shift		N	Rm					imm6						Rn					Rd

32-bit (sf == 0)

ORN <Wd>, <Wn>, <Wm>{, <shift> #<amount>}

64-bit (sf == 1)

ORN <Xd>, <Xn>, <Xm>{, <shift> #<amount>}

Decoding algorithm

if sf == '0' && imm6<5> == '1' then EndOfDecode(Decode_UNDEF);
constant integer d = UInt(Rd);
constant integer n = UInt(Rn);
constant integer m = UInt(Rm);
constant integer datasize = 32 << UInt(sf);
constant ShiftType shift_type = DecodeShift(shift);
constant integer shift_amount = UInt(imm6);

Operation

constant bits(datasize) operand1 = X[n, datasize];
constant bits(datasize) operand2 = ShiftReg(m, shift_type, shift_amount, datasize);

X[d, datasize] = operand1 OR NOT(operand2);

Explanations

<Wd>: Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.
<Wn>: Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field.
<Wm>: Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field.
<shift>: <amount>: For the "32-bit" variant: is the shift amount, in the range 0 to 31, defaulting to 0 and encoded in the "imm6" field.
<amount>: For the "64-bit" variant: is the shift amount, in the range 0 to 63, defaulting to 0 and encoded in the "imm6" field.
<Xd>: Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.
<Xn>: Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field.
<Xm>: Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field.

Operational Notes

If PSTATE.DIT is 1:

• The execution time of this instruction is independent of:
  • The values of the data supplied in any of its registers.
  • The values of the NZCV flags.
• The response of this instruction to asynchronous exceptions does not vary based on:
  • The values of the data supplied in any of its registers.
  • The values of the NZCV flags.