PMOV (to predicate)

Move predicate from vector

Copy a packed bitmap, where bit value 0b1 represents TRUE and bit value 0b0 represents FALSE, from a portion of the source vector register to elements of the destination SVE predicate register.

Because the number of bits in an SVE predicate element scales with the vector element size, the behavior varies according to the specified element size.

  • When the predicate element specifier is B, each bit [N] from the least-significant VL/8 bits in the source vector register is copied to bit [N] of the destination predicate register. The portion index, if specified, must be 0.
  • When the predicate element specifier is H, each bit [N] within the indexed block of VL/16 bits in the source vector register is copied to bit [N*2] of the destination predicate register, and the other bits in the predicate are set to zero. The portion index is in the range 0 to 1, inclusive.
  • When the predicate element specifier is S, each bit [N] within the indexed block of VL/32 bits in the source vector register is copied to bit [N*4] of the destination predicate register, and the other bits in the predicate are set to zero. The portion index is in the range 0 to 3, inclusive.
  • When the predicate element specifier is D, each bit [N] within the indexed block of VL/64 bits in the source vector register is copied to bit [N*8] of the destination predicate register, and the other bits in the predicate are set to zero. The portion index is in the range 0 to 7, inclusive.

    • The portion index is optional, defaulting to 0 if omitted.

    Encoding: Byte

    Variants: FEAT_SVE2p1 || FEAT_SME2p1 (FEAT_SVE2p1 || FEAT_SME2p1)

    313029282726252423222120191817161514131211109876543210
    00000101001010100011100
    opcopc2ZnPd

    PMOV <Pd>.B, <Zn>

    Decoding algorithm

    if !IsFeatureImplemented(FEAT_SVE2p1) && !IsFeatureImplemented(FEAT_SME2p1) then
    EndOfDecode(Decode_UNDEF);
constant integer n = UInt(Zn);
constant integer d = UInt(Pd);
constant integer esize = 8;
constant integer imm = 0;

    Encoding: Doubleword

    Variants: FEAT_SVE2p1 || FEAT_SME2p1 (FEAT_SVE2p1 || FEAT_SME2p1)

    313029282726252423222120191817161514131211109876543210
    00000101110100011100
    i3hi3lZnPd

    PMOV <Pd>.D, <Zn>{[<imm>]}

    Decoding algorithm

    if !IsFeatureImplemented(FEAT_SVE2p1) && !IsFeatureImplemented(FEAT_SME2p1) then
    EndOfDecode(Decode_UNDEF);
constant integer n = UInt(Zn);
constant integer d = UInt(Pd);
constant integer esize = 64;
constant integer imm = UInt(i3h:i3l);

    Encoding: Halfword

    Variants: FEAT_SVE2p1 || FEAT_SME2p1 (FEAT_SVE2p1 || FEAT_SME2p1)

    313029282726252423222120191817161514131211109876543210
    0000010100101100011100
    opci1ZnPd

    PMOV <Pd>.H, <Zn>{[<imm>]}

    Decoding algorithm

    if !IsFeatureImplemented(FEAT_SVE2p1) && !IsFeatureImplemented(FEAT_SME2p1) then
    EndOfDecode(Decode_UNDEF);
constant integer n = UInt(Zn);
constant integer d = UInt(Pd);
constant integer esize = 16;
constant integer imm = UInt(i1);

    Encoding: Word

    Variants: FEAT_SVE2p1 || FEAT_SME2p1 (FEAT_SVE2p1 || FEAT_SME2p1)

    313029282726252423222120191817161514131211109876543210
    000001010110100011100
    opci2ZnPd

    PMOV <Pd>.S, <Zn>{[<imm>]}

    Decoding algorithm

    if !IsFeatureImplemented(FEAT_SVE2p1) && !IsFeatureImplemented(FEAT_SME2p1) then
    EndOfDecode(Decode_UNDEF);
constant integer n = UInt(Zn);
constant integer d = UInt(Pd);
constant integer esize = 32;
constant integer imm = UInt(i2);

    Operation

    CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
constant bits(VL) operand = Z[n, VL];
bits(PL) result;
constant integer psize = esize DIV 8;

for e = 0 to elements-1
    Elem[result, e, psize] = ZeroExtend(operand<(elements * imm) + e>, psize);

P[d, PL] = result;

    Explanations

    <Pd>: Is the name of the destination scalable predicate register, encoded in the "Pd" field.
    <Zn>: Is the name of the source scalable vector register, encoded in the "Zn" field.
    <imm>: For the "Doubleword" variant: is the optional portion index, in the range 0 to 7, defaulting to 0, encoded in the "i3h:i3l" fields.
    <imm>: For the "Halfword" variant: is the optional portion index, in the range 0 to 1, defaulting to 0, encoded in the "i1" field.
    <imm>: For the "Word" variant: is the optional portion index, in the range 0 to 3, defaulting to 0, encoded in the "i2" field.