RCWSSWP, RCWSSWPA, RCWSSWPAL, RCWSSWPL

Read check write software swap doubleword in memory

This instruction atomically loads a 64-bit doubleword from a memory location, and conditionally stores the value held in a register back to the same memory location. Storing back to memory is conditional on RCW Checks and RCWS Checks. The value initially loaded from memory is returned in the destination register. This instruction updates the condition flags based on the result of the update of memory.

  • RCWSSWPA and RCWSSWPAL load from memory with acquire semantics.
  • RCWSSWPL and RCWSSWPAL store to memory with release semantics.
  • RCWSSWP has neither acquire nor release semantics.

    • This instruction is for performing atomic updates of translation table entries and not for general use.

    Encoding: Integer

    Variants: FEAT_THE (ARMv8.9)

    313029282726252423222120191817161514131211109876543210
    011110001101000
    SVRARRso3opcRnRt

    RCWSSWP (A == 0 && R == 0)

    RCWSSWP <Xs>, <Xt>, [<Xn|SP>]

    RCWSSWPA (A == 1 && R == 0)

    RCWSSWPA <Xs>, <Xt>, [<Xn|SP>]

    RCWSSWPAL (A == 1 && R == 1)

    RCWSSWPAL <Xs>, <Xt>, [<Xn|SP>]

    RCWSSWPL (A == 0 && R == 1)

    RCWSSWPL <Xs>, <Xt>, [<Xn|SP>]

    Decoding algorithm

    if !IsFeatureImplemented(FEAT_THE) then EndOfDecode(Decode_UNDEF);
constant integer s = UInt(Rs);
constant integer t = UInt(Rt);
constant integer n = UInt(Rn);
constant boolean soft = TRUE;

constant boolean acquire = A == '1' && Rt != '11111';
constant boolean release = R == '1';
constant boolean tagchecked = n != 31;

    Operation

    if IsD128Enabled(PSTATE.EL) then UNDEFINED;
bits(64) address;
constant bits(64) newdata = X[s, 64];
bits(64) readdata;
bits(4) nzcv;

constant AccessDescriptor accdesc = CreateAccDescRCW(MemAtomicOp_SWP, soft, acquire, release,
                                                     tagchecked);

if n == 31 then
    CheckSPAlignment();
    address = SP[64];
else
    address = X[n, 64];

constant bits(64) compdata = bits(64) UNKNOWN;    // Irrelevant when not executing CAS
(nzcv, readdata) = MemAtomicRCW(address, compdata, newdata, accdesc);

PSTATE. = nzcv;
X[t, 64] = readdata;   // Return the old value when t!=31

    Explanations

    <Xs>: Is the 64-bit name of the general-purpose register to be stored, encoded in the "Rs" field.
    <Xt>: Is the 64-bit name of the general-purpose register to be loaded, encoded in the "Rt" field.
    <Xn|SP>: Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.