RDVL

Read multiple of vector register size to scalar register

Multiply the current vector register size in bytes by an immediate in the range -32 to 31 and place the result in the 64-bit destination general-purpose register.

Encoding: SVE

Variants: FEAT_SVE || FEAT_SME (FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
000001001011111101010
opopc2imm6Rd

RDVL <Xd>, #<imm>

Decoding algorithm

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then
    EndOfDecode(Decode_UNDEF);
constant integer d = UInt(Rd);
constant integer imm = SInt(imm6);

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer len = imm * (VL DIV 8);
X[d, 64] = len<63:0>;

Explanations

<Xd>: Is the 64-bit name of the destination general-purpose register, encoded in the "Rd" field.
<imm>: Is the signed immediate operand, in the range -32 to 31, encoded in the "imm6" field.

Operational Notes

If PSTATE.DIT is 1: