SDIV

Signed divide

This instruction divides the first signed source register value by the second signed source register value, and writes the result to the destination register. Dividing by zero writes the value zero to the destination register. The condition flags are not affected.

Encoding: Integer

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	0	0	1	1	0	1	0	1	1	0						0	0	0	0	1	1
sf		S									Rm										o1	Rn					Rd

32-bit (sf == 0)

SDIV <Wd>, <Wn>, <Wm>

64-bit (sf == 1)

SDIV <Xd>, <Xn>, <Xm>

Decoding algorithm

constant integer d = UInt(Rd);
constant integer n = UInt(Rn);
constant integer m = UInt(Rm);
constant integer datasize = 32 << UInt(sf);

Operation

constant bits(datasize) operand1 = X[n, datasize];
constant bits(datasize) operand2 = X[m, datasize];
constant integer dividend = SInt(operand1);
constant integer divisor  = SInt(operand2);
integer result;
if divisor == 0 then
    result = 0;
elsif (dividend < 0) == (divisor < 0) then
    result = Abs(dividend) DIV Abs(divisor);    // same signs - positive result
else
    result = -(Abs(dividend) DIV Abs(divisor)); // different signs - negative result
X[d, datasize] = result;

Explanations

<Wd>: Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.
<Wn>: Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field.
<Wm>: Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field.
<Xd>: Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.
<Xn>: Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field.
<Xm>: Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field.