SQINCP (scalar)

Signed saturating increment scalar by count of true predicate elements

Counts the number of true elements in the source predicate and then uses the result to increment the scalar destination. The result is saturated to the source general-purpose register's signed integer range. A 32-bit saturated result is then sign-extended to 64 bits.

Encoding: 32-bit

Variants: FEAT_SVE || FEAT_SME (FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
001001011010001000100
sizeDUsfopPmRdn

SQINCP <Xdn>, <Pm>.<T>, <Wdn>

Decoding algorithm

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then
    EndOfDecode(Decode_UNDEF);
constant integer esize = 8 << UInt(size);
constant integer m = UInt(Pm);
constant integer dn = UInt(Rdn);
constant boolean unsigned = FALSE;
constant integer ssize = 32;

Encoding: 64-bit

Variants: FEAT_SVE || FEAT_SME (FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
001001011010001000110
sizeDUsfopPmRdn

SQINCP <Xdn>, <Pm>.<T>

Decoding algorithm

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then
    EndOfDecode(Decode_UNDEF);
constant integer esize = 8 << UInt(size);
constant integer m = UInt(Pm);
constant integer dn = UInt(Rdn);
constant boolean unsigned = FALSE;
constant integer ssize = 64;

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
constant bits(ssize) operand1 = X[dn, ssize];
constant bits(PL) operand2 = P[m, PL];
bits(ssize) result;
integer count = 0;

for e = 0 to elements-1
    if ActivePredicateElement(operand2, e, esize) then
        count = count + 1;

constant integer element = Int(operand1, unsigned);
(result, -) = SatQ(element + count, ssize, unsigned);
X[dn, 64] = Extend(result, 64, unsigned);

Explanations

<Xdn>: Is the 64-bit name of the source and destination general-purpose register, encoded in the "Rdn" field.
<Pm>: Is the name of the source scalable predicate register, encoded in the "Pm" field.
<T>: <Wdn>: Is the 32-bit name of the source and destination general-purpose register, encoded in the "Rdn" field.

Operational Notes

If FEAT_SME is implemented and the PE is in Streaming SVE mode, then any subsequent instruction which is dependent on the general-purpose register written by this instruction might be significantly delayed.