STSMINB, STSMINLB

Atomic signed minimum on byte in memory, without return

This instruction atomically loads an 8-bit byte from memory, compares it against the value held in a register, and stores the smaller value back to memory, treating the values as signed numbers.

STSMINB does not have release semantics.

STSMINLB stores to memory with release semantics, as described in Load-Acquire, Store-Release.

For information about addressing modes, see Load/Store addressing modes.

Encoding: Integer

Variants: FEAT_LSE (ARMv8.1)

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	1	1	0	0	0	0		1						0	1	0	1	0	0						1	1	1	1	1
size					VR			A	R		Rs					o3	opc					Rn					Rt

No memory ordering (R == 0)

STSMINB <Ws>, [<Xn|SP>]

Equivalent to: LDSMINB <Ws>, WZR, [<Xn|SP>]

Release (R == 1)

STSMINLB <Ws>, [<Xn|SP>]

Equivalent to: LDSMINLB <Ws>, WZR, [<Xn|SP>]

Explanations

<Ws>: Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location, encoded in the "Rs" field.
<Xn|SP>: Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.

Operational Notes

If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored.