ZERO (single-vector)

Zero ZA single-vector groups

This instruction zeroes two or four ZA single-vector groups.

The single-vector group within each half of or each quarter of the ZA array is selected by the sum of the vector select register and offset, modulo half or quarter the number of ZA array vectors.

The vector group symbol, VGx2 or VGx4, indicates that the ZA operand consists of two or four ZA single-vector groups respectively.

Encoding: Two ZA single-vectors

Variants: FEAT_SME2p1 (ARMv9.4)

313029282726252423222120191817161514131211109876543210
110000000000110000000000000
opcRvoff3

ZERO ZA.D[<Wv>, <offs>, VGx2]

Decoding algorithm

if !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF);
constant integer v = UInt('010':Rv);
constant integer offset = UInt(off3);
constant integer ngrp = 2;

Encoding: Four ZA single-vectors

Variants: FEAT_SME2p1 (ARMv9.4)

313029282726252423222120191817161514131211109876543210
110000000000111000000000000
opcRvoff3

ZERO ZA.D[<Wv>, <offs>, VGx4]

Decoding algorithm

if !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF);
constant integer v = UInt('010':Rv);
constant integer offset = UInt(off3);
constant integer ngrp = 4;

Operation

CheckStreamingSVEAndZAEnabled();
constant integer VL = CurrentVL;
constant integer vectors = VL DIV 8;
constant integer vstride = vectors DIV ngrp;
constant bits(32) vbase = X[v, 32];
integer vec = (UInt(vbase) + offset) MOD vstride;
for r = 0 to ngrp-1
    ZAvector[vec, VL] = Zeros(VL);
    vec = vec + vstride;

Explanations

<Wv>: Is the 32-bit name of the vector select register W8-W11, encoded in the "Rv" field.
<offs>: Is the vector select offset, in the range 0 to 7, encoded in the "off3" field.

Operational Notes

If PSTATE.DIT is 1: