MOV (vector to array, two registers)

Move two vector registers to two ZA single-vector groups

This instruction operates on two ZA single-vector groups.

The single-vector group within each half of the ZA array is selected by the sum of the vector select register and offset, modulo half the number of ZA array vectors.

The vector group symbol VGx2 indicates that the instruction operates on two ZA single-vector groups.

The preferred disassembly syntax uses a 64-bit element size, but an assembler should accept any element size if it is used consistently for all operands. The vector group symbol is preferred for disassembly, but optional in assembler source code.

This instruction is unpredicated.

Encoding: SME2

Variants: FEAT_SME2 (ARMv9.3)

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	0	0	0	0	1	0	0	0			0	1	0					0	0	0
																	Rv					Zn							off3

MOV ZA.D[<Wv>, <offs>{, VGx2}], { <Zn1>.D-<Zn2>.D }

Equivalent to: MOVA ZA.D[<Wv>, <offs>{, VGx2}], { <Zn1>.D-<Zn2>.D }

Explanations

<Wv>: Is the 32-bit name of the vector select register W8-W11, encoded in the "Rv" field.
<offs>: Is the vector select offset, in the range 0 to 7, encoded in the "off3" field.
<Zn1>: Is the name of the first scalable vector register of the source multi-vector group, encoded as "Zn" times 2.
<Zn2>: Is the name of the second scalable vector register of the source multi-vector group, encoded as "Zn" times 2 plus 1.

Operational Notes

If PSTATE.DIT is 1:

• The execution time of this instruction is independent of:
  • The values of the data supplied in any of its registers.
  • The values of the NZCV flags.
• The response of this instruction to asynchronous exceptions does not vary based on:
  • The values of the data supplied in any of its registers.
  • The values of the NZCV flags.